Publications
• S³A-NPU: A High-Performance Hardware Accelerator for Spiking Self-Supervised Learning with Dynamic Adaptive Memory Optimization
• High-Speed Energy-Efficient Model based Dynamic Pruning using Pattern-based Alignment for Convolutional Spiking Neural Network Hardware Accelerator
• Low-Power Lane Detection Unit with Sliding-based Parallel Segment Detection Accelerator for Lightweighted Automotive Microcontrollers
• Efficient Object Detection based on Masking Semantic Segmentation Region for Lightweight Embedded Processors
• Efficient Object Recognition by Masking Semantic Pixel Difference Region of Vision Snapshot for Lightweight Embedded Systems
Conferences
• Opti-SpiSSL: A Highly Reconfigurable Hardware Generation Framework for Spiking Self-Supervised Learning on Heterogeneous SoC
• A Power-Efficient Reconfigurable Hybrid CNN-SNN Accelerator for High Performance AI Applications
• Deep Learning based Human Detection using Thermal-RGB Data Fusion for Safe Automotive Guided-Driving
• Parallel Processing of 3D Object Recognition by Fusion of 2D Images and LiDAR for Autonomous Driving
• Dynamic MAC Unit Pruning Techniques in Runtime RTL Simulation for Area-Accuracy Efficient Implementation of Neural Network Accelerator
• Low-Power Parallel Lane Detection Unit for Lightweight Automotive Processors
• FPGA Realization of Lane Detection Unit using Sliding-based Parallel Segment Detection for Buffer Memory Reduction
• Mitigating Overflow of Object Detection Tasks Based on Masking Semantic Difference Region of Vision Snapshot for High Efficiency
• Yolo-based Realtime Object Detection using Interleaved Redirection of Time-Multiplxed Streamline of Vision Snapshot for Lightweighted Embedded Processors
• Simulation of Self-driving System by implementing Digital Twin with GTA5